KSZ8895MQXI Ethernet ICs 5Port 10/100 Managed Switch w/ MII RMII

Short Description:

Manufacturers: Microchip Technology
Product Category: Interface – Controllers
Data Sheet: KSZ8895MQXI
Description: IC ETHERNET SWITCH 5PORT 128PQFP
RoHS status: RoHS Compliant


Product Detail

Features

applications

Product Tags

♠ Product Description

Product Attribute Attribute Value
Manufacturer: Microchip
Product Category: Ethernet ICs
RoHS:  Details
Mounting Style: SMD/SMT
Package / Case: PQFP-128
Product: Ethernet Switches
Standard: 10BASE-T, 100BASE-TX
Number of Transceivers: 5 Transceiver
Data Rate: 10 Mb/s, 100 Mb/s
Interface Type: 7-Wire, I2C, MDI, MDI-X, MII, MIIM, RMII, SMI, SPI
Operating Supply Voltage: 3.3 V
Minimum Operating Temperature: - 40 C
Maximum Operating Temperature: + 85 C
Series: KSZ8895
Packaging: Tray
Brand: Microchip Technology / Atmel
Development Kit: KSZ8895MQX-EVAL
Duplex: Full-Duplex, Half-Duplex
Moisture Sensitive: Yes
Product Type: Ethernet ICs
Factory Pack Quantity: 66
Subcategory: Communication & Networking ICs
Supply Current - Max: 86 mA, 107 mA
Supply Voltage - Max: 3.3 V
Supply Voltage - Min: 1.8 V
Unit Weight: 0.031394 oz

♠ Integrated 5-Port 10/100 Managed Ethernet Switch with MII/RMII Interface

The KSZ8895MQX/RQX/FQX/MLX is a highly-integrated, Layer 2 managed, five-port switch with numerous features designed to reduce system cost. Intended for cost-sensitive 10/100Mbps five-port switch systems with low power consumption, on-chip termination, and internal core power controllers, it supports high-performance memory bandwidth and shared memory-based switch fabric with non-blocking configuration. Its extensive feature set includes power management, programmable rate limit and priority ratio, tag/port-based VLAN, packets filtering, four-queue QoS prioritization, management interfaces, and MIB counters. The KSZ8895 family provides multiple CPU data interfaces to effectively address both current and emerging fast Ethernet applications when Port 5 is configured to separate MAC5 with SW5- MII/RMII and PHY5 with P5-MII/RMII interfaces.

The KSZ8895 family offers three configurations, providing the flexibility to meet different requirements:
• KSZ8895MQX/MLX: Five 10/100Base-T/TX transceivers, One SW5-MII, and One P5-MII interface
• KSZ8895RQX: Five 10/100Base-T/TX transceivers, One SW5-RMII, and One P5-RMII interface
• KSZ8895FQX: Four 10/100Base-T/TX transceivers on Ports 1, 2, 3, and 5 (port 3 can be set to fiber mode). One 100Base-FX transceiver on Port 4. One SW5-MII and One P5-MII interface

All registers of MACs and PHYs units can be managed by the SPI or the SMI interface. MIIM registers can be accessed through the MDC/MDIO interface. EEPROM can set all control registers for the unmanaged mode.

KSZ8895MQX/RQX/FQX are available in the 128-pin PQFP package. KSZ8895MLX is available as a 128-pin LQFP package.


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  • Advanced Switch Features
    • IEEE 802.1q VLAN Support for up to 128 Active VLAN Groups (Full-Range 4096 of VLAN IDs)
    • Static MAC Table Supports up to 32 Entries
    • VLAN ID Tag/Untagged Options, Per Port Basis
    • IEEE 802.1p/q Tag Insertion or Removal on a Per Port Basis Based on Ingress Port (Egress)
    • Programmable Rate Limiting at the Ingress and Egress on a Per Port Basis
    • Jitter-Free Per Packet Based Rate Limiting Support
    • Broadcast Storm Protection with Percentage Control (Global and Per Port Basis)
    • IEEE 802.1d Rapid Spanning Tree Protocol RSTP Support
    • Tail Tag Mode (1 Byte Added Before FCS) Support at Port 5 to Inform the Processor Which Ingress Port Receives the Packet
    • 1.4 Gbps High-Performance Memory Bandwidth and Shared Memory Based Switch Fabric with Fully Non-Blocking Configuration
    • Dual MII with MAC 5 and PHY 5 on Port 5, SW5- MII/RMII for MAC 5 and P5-MII/RMII for PHY 5
    • Enable/Disable Option for Huge Frame Size up to 2000 Bytes Per Frame
    • IGMP v1/v2 Snooping (IPv4) Support for Multicast Packet Filtering
    • IPv4/IPv6 QoS Support
    • Support Unknown Unicast/Multicast Address and Unknown VID Packet Filtering
    • Self-Address Filtering

    Comprehensive Configuration Register Access
    • Serial Management Interface (MDC/MDIO) to All PHYs Registers and SMI Interface (MDC/MDIO) to All Registers
    • High-Speed SPI (up to 25 MHz) and I2C Master Interface to all Internal Registers
    • I/O Pins Strapping and EEPROM to Program Selective Registers in Unmanaged Switch Mode
    • Control Registers Configurable on the Fly (PortPriority, 802.1p/d/q, AN…) QoS/CoS Packet Prioritization Support
    • Per Port, 802.1p and DiffServ-Based
    • 1/2/4-Queue QoS Prioritization Selection
    • Programmable Weighted Fair Queuing for Ratio Control
    • Re-Mapping of 802.1p Priority Field Per Port Basis

    Integrated 5-Port 10/100 Ethernet Switch
    • New Generation Switch with Five MACs and Five PHYs that are Fully Compliant with the IEEE 802.3u Standard
    • PHYs Designed with Patented Enhanced MixedSignal Technology
    • Non-Blocking Switch Fabric Ensures Fast Packet Delivery by Utilizing a 1K MAC Address Lookup Table and a Store-and-Forward Architecture
    • On-Chip 64Kbyte Memory for Frame Buffering (Not Shared with 1K Unicast Address Table)
    • Full-Duplex IEEE 802.3x Flow Control (PAUSE) with Force Mode Option
    • Half-Duplex Back Pressure Flow Control
    • HP Auto MDI/MDI-X and IEEE Auto Crossover Support
    • SW-MII Interface Supports Both MAC Mode and PHY Mode
    • 7-Wire Serial Network Interface (SNI) Support for Legacy MAC
    • Per Port LED Indicators for Link, Activity, and 10/ 100 Speed
    • Register Port Status Support for Link, Activity, Full-/Half-Duplex and 10/100 Speed
    • LinkMD® Cable Diagnostic Capabilities
    • On-Chip Terminations and Internal Biasing Technology for Cost Down and Lowest Power Consumption

    Switch Monitoring Features
    • Port Mirroring/Monitoring/Sniffing: Ingress and/or Egress Traffic to Any Port or MII
    • MIB Counters for Fully Compliant Statistics Gathering; 34 MIB Counters Per Port
    • Loopback Support for MAC, PHY, and Remote Diagnostic of Failure
    • Interrupt for the Link Change on Any Ports Low-Power Dissipation
    • Full-Chip Hardware Power-Down
    • Full-Chip Software Power-Down and Per Port Software Power-Down
    • Energy-Detect Mode Support <100 mW Full-Chip Power Consumption When All Ports Have No Activity
    • Very-Low Full-Chip Power Consumption (<0.5W) in Standalone 5-Port, without Extra Power Consumption on Transformers
    • Dynamic Clock Tree Shutdown Feature
    • Voltages: Single 3.3V Supply with 3.3V VDDIO and Internal 1.2V LDO Controller Enabled, or External 1.2V LDO Solution
    - Analog VDDAT 3.3V Only
    - VDDIO Support 3.3V, 2.5V, and 1.8V
    - Low 1.2V Core Power
    • Commercial Temperature Range: 0°C to +70°C
    • Industrial Temperature Range: –40°C to +85°C
    • Available in 128-pin PQFP and 128-pin LQFP, Lead-Free Packages

    • Typical

    • VoIP Phone

    • Set-Top/Game Box

    • Industrial Control

    • IPTV POF

    • SOHO Residential Gateway

    • Broadband Gateway/Firewall/VPN

    • Integrated DSL/Cable Modem

    • Wireless LAN Access Point + Gateway

    • Standalone 10/100 5-Port Switch

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