STM32H723ZET6 ARM Microcontrollers – MCU High-performance & DSP DP-FPU, Arm Cortex-M7 MCU 512 Kbytes Flash, 564 Kbytes RA
♠ Product Description
Product Attribute | Attribute Value |
Manufacturer: | STMicroelectronics |
Product Category: | ARM Microcontrollers - MCU |
RoHS: | Details |
Series: | STM32 |
Packaging: | Tray |
Brand: | STMicroelectronics |
Moisture Sensitive: | Yes |
Product Type: | ARM Microcontrollers - MCU |
Factory Pack Quantity: | 360 |
Subcategory: | Microcontrollers - MCU |
Tradename: | STM32 |
♠ Arm® Cortex®-M7 32-bit 550 MHz MCU, up to 1 MB Flash, 564 KB RAM, Ethernet, USB, 3x FD-CAN, Graphics, 2x 16-bit ADCs
STM32H723xE/G devices are based on the high-performance Arm® Cortex®-M7 32-bit RISC core operating at up to 550 MHz. The Cortex® -M7 core features a floating point unit (FPU) which supports Arm® double-precision (IEEE 754 compliant) and single-precision data-processing instructions and data types. The Cortex -M7 core includes 32 Kbytes of instruction cache and 32 Kbytes of data cache. STM32H723xE/G devices support a full set of DSP instructions and a memory protection unit (MPU) to enhance application security.
STM32H723xE/G devices incorporate high-speed embedded memories with up to 1 Mbyte of Flash memory, up to 564 Kbytes of RAM (including 192 Kbytes that can be shared between ITCM and AXI, plus 64 Kbytes exclusively ITCM, plus 128 Kbytes exclusively AXI, 128 Kbyte DTCM, 48 Kbytes AHB and 4 Kbytes of backup RAM), as well as an extensive range of enhanced I/Os and peripherals connected to APB buses, AHB buses, 2x32-bit multi-AHB bus matrix and a multi layer AXI interconnect supporting internal and external memory access. To improve application robustness, all memories feature error code correction (one error correction, two error detections).
Core
• 32-bit Arm® Cortex®-M7 CPU with DP-FPU, L1 cache: 32-Kbyte data cache and 32-Kbyte instruction cache allowing 0-wait state execution from embedded Flash memory and external memories, frequency up to 550 MHz, MPU, 1177 DMIPS/2.14 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
Memories
• Up to 1 Mbyte of embedded Flash memory with ECC
• SRAM: total 564 Kbytes all with ECC, including 128 Kbytes of data TCM RAM for critical real-time data + 432 Kbytes of system RAM (up to 256 Kbytes can remap on instruction TCM RAM for critical real time instructions) + 4 Kbytes of backup SRAM (available in the lowest-power modes)
• Flexible external memory controller with up to 16-bit data bus: SRAM, PSRAM, SDRAM/LPSDR SDRAM, NOR/NAND memories
• 2 x Octo-SPI interface with XiP
• 2 x SD/SDIO/MMC interface
• Bootloader
Graphics
• Chrom-ART Accelerator graphical hardware accelerator enabling enhanced graphical user interface to reduce CPU load
• LCD-TFT controller supporting up to XGA resolution
Clock, reset and supply management
• 1.62 V to 3.6 V application supply and I/O
• POR, PDR, PVD and BOR
• Dedicated USB power
• Embedded LDO regulator
• Internal oscillators: 64 MHz HSI, 48 MHz HSI48, 4 MHz CSI, 32 kHz LSI
• External oscillators: 4-50 MHz HSE, 32.768 kHz LSE
Low power
• Sleep, Stop and Standby modes
• VBAT supply for RTC, 32×32-bit backup registers
Analog
• 2×16-bit ADC, up to 3.6 MSPS in 16-bit: up to 18 channels and 7.2 MSPS in double-interleaved mode
• 1 x 12-bit ADC, up to 5 MSPS in 12-bit, up to 12 channels
• 2 x comparators
• 2 x operational amplifier GBW = 8 MHz
• 2× 12-bit D/A converters